Low Power Optimization Techniques for BDD Mapped Finite State Machines
نویسندگان
چکیده
In modern design ows low power aspects should be considered as early as possible to minimize power dissipation in the resulting circuit. A new BDD-based design style that considers switching activity optimization using temporal correlation information is presented. The technique is developed as an approximation method for switching activity estimation. Experimental results on a set of MCNC and ISCAS89 benchmarks show the estimated reduction in power dissipation.
منابع مشابه
Low-power optimization techniques for BDD mapped circuits using temporal correlation Techniques d’optimisation pour les faibles puissances pour des diagrammes de décision binaire utilisant la corrélation temporelle
In modern design flows low-power aspects should be considered as early as possible to minimize power dissipation in the resulting circuit. A new binary decision diagram–based design style that considers switching activity optimization using temporal correlation information is presented. The technique is based on an approximation method for switching activity estimation. In the case of finite st...
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